The Opportunity:
This role is an analog mixed-signal IC layout opportunity in a growing and innovative deep-tech start-up. You are reporting to the IC design lead engineer, and you will be working closely with the technical founders to design and create a new architecture for our innovative AI hardware. Your responsibilities will include the layout design and post-layout simulation of innovative AI ASICs on silicon level. As one of our key hires, you will have the chance to get a leadership position at an early stage.
Your Role:
As an analog mixed-signal IC layout engineer, you will be responsible for transferring the schematic design of the analog ASIC to a silicon-level layout. You will iteratively communicate with the IC design lead engineer to adapt the schematic design based on physical limitations. You are responsible for the layout documentation, reporting, and post-layout simulations of the analog design. Furthermore, you will perform low-noise and low-power analog layout design, top-level floor-planning, and perform all LVS/DRC/ERC checks.
Take ownership of the analog IC design from conceptual work to validation and characterization.
- Transferring analog schematic designs to silicon-level layout design.
- Designing ultra-low-power analog ASIC layout.
- Translating block-level specifications to silicon-level specifications.
- Preparing and executing post-layout simulations.
- Participating in the whole tape-out process including communication with external chip manufacturers, testing, and evaluation.
- Ensure the database is fully compliant with all requirements of the tape-out flow.
- Perform and pass all physical and reliability verification such as LVC/DRC/ERC.
- Responsible for full-chip physical verification sign-off.
- Technical ownership for the analog IC from layout design to testing and validation.
- Participate in design reviews and presentation of reports.
- Perform feasibility studies and analyze new analog layout concepts.
- Maintain an overview of competitor solutions.
What you bring:
Essential:
- Master’s degree in electrical engineering, physics, or a related field with 2+ years of hands-on experience in analog mixed-signal IC layout design or a Ph.D. degree with a proven track record in analog mixed-signal IC layout design.
- Strong knowledge of floor-planning techniques, power mesh planning, low-noise signal routing, IO pads, and analog mixed-signal chip integration flow.
- Proficient in Cadence layout editor and physical verification tools.
- Proficient in DRC/LVS debugging.
- Layout design experience in sophisticated CMOS technologies, design with RRAM technology.
- Experience in analog mixed-signal CMOS transistor-level layout design.
- Adaptability and willingness to learn new approaches, solutions, and skills.
- Self-motivated, creative, hard-working individual with an entrepreneurial mindset.
- Analytical mindset with the ability to problem solve, work as a team and drive solutions.
- Excellent communicator. Ability to report and present in English.
- Flexibility and willingness to work in an agile deep-tech start-up.
Preferred:
- Familiarity with ADC, DCA, LNA, analog filters, or bandgap.
- Experience with digital designs including mixed-signal components.
